The present invention generally relates to circuits for providing a reference voltage, and in particular to a circuit for providing a stable reference voltage despite abrupt supply voltage variations, and especially, but not limited to, as applied to video amplifiers supplying a cathode-ray tube.
FIG. 1 shows a video amplifier 2 including an operational amplifier 4, the positive terminal of which receives a reference voltage VREF generated by a circuit 6. The output of amplifier 4 is coupled with its negative terminal via a resistor 8 (R2). The negative terminal also receives a video signal VIN via a resistor 10 (R1). Amplifier 4 generates a voltage VOUT intended for controlling the cathode of a cathode-ray tube which may be represented by a capacitive load 12 (C). Amplifier 4 further has two supply poles respectively connected to ground and to a positive supply voltage VALIM. Circuit 6, which is here used to establish a reference for the black level, is also supplied by voltage VALIM, although this has not been shown for clarity reasons.
Circuit 6 is provided for compensating the variations of supply voltage VALIM. In some applications, these variations, for example due to a temperature change, are slow and circuit 6 is designed to avoid passing them on to reference voltage VREF. In some applications, however, supply voltage VALIM can abruptly vary, for example due to a current consumption peak, and this abrupt supply voltage variation can translate as a momentaneous variation of the reference voltage.
FIG. 2 illustrates an example of such a malfunction in the context of the video amplifier of FIG. 1. In FIG. 2, input signal VIN is at a constant level before a time t0, then undergoes a series of fast variations of large amplitude. Such variations may correspond, in the illustrated example, to the display of a series of narrow vertical stripes on the screen, alternately white and black. Output voltage VOUT, which reproduces after amplification the inverse of signal VIN, also varies rapidly, which, due to the relatively low impedance of load C, compels the power supply source to provide a strong current from time t0. Supply voltage VALIM accordingly varies by a value xcex94VALIM (which is positive in the example shown). This voltage variation is too fast to be immediately compensated by circuit 6, and voltage VREF varies, as will be seen hereafter, by a value xcex94VREF which depends on value xcex94VALIM. Since the voltage received on the positive terminal of amplifier 4 has varied by xcex94VREF, signal VOUT, which used to be equal to xe2x88x92K(VIN+VREF)+VREF, becomes:
VOUT=xe2x88x92K(VIN+VREF+xcex94VREF)+VREF+xcex94VREF, 
where K (equal to R2/R1) is the gain of circuit 2.
At a time t1 that depends on value xcex94VREF and on the faculty of xe2x80x9crecoveryxe2x80x9d of circuit 6, voltage VREF takes its nominal value again and signal VOUT once again becomes
VOUT=xe2x88x92K(VIN+VREF)+VREF. 
At a time t2, signal VIN becomes stable again, the current surges stop on the supply source, voltage VALIM increases by xcex94VALIM and takes its initial value again. Voltage VREF increases by value xcex94VREF at time t2 and signal VOUT then becomes equal to:
xe2x88x92K(VIN+VREF+xcex94VREF)+VREF+xcex94VREF. 
A little later, at a time t3, voltage VREF takes its nominal value again and output signal VOUT once again becomes xe2x88x92K(VIN+VREF)+VREF.
These variations of reference voltage VREF are very disturbing. In the illustrated example, the deformation of signal VOUT which occurs between times t2 and t3 causes a particularly unsightly light streak.
Accordingly, the disclosed embodiments of the present invention provides a circuit that generates a particularly stable reference voltage.
The embodiments of the present invention also provide such a circuit that is easy to make in the form of an integrated circuit.
To achieve the foregoing features and advantages, as well as others, the disclosed embodiments of the present invention provide a circuit for generating a reference voltage, including a first transistor of bipolar type, the emitter of which provides the reference voltage and the collector of which is connected to a first supply pole, a second MOS-type transistor, the drain of which is connected to the base of the first transistor and the source of which is connected to a second supply pole, a control block, an output of which is connected to the gate of the second transistor and an input of which is connected to the emitter of the first transistor, a capacitor connected to the output of the control block and coupled to the first supply pole via a first impedance, and a second impedance connected on the one hand to the second transistor and on the other hand to the connection point between the capacitor and the first impedance.
According to an embodiment of the present invention, the second impedance is a first resistor.
According to an embodiment of the present invention, the second impedance corresponds to the transconductance of a third diode-mounted MOS type transistor.
According to another embodiment of the present invention, the control block includes fourth and fifth bipolar transistors, of the type of the first transistor, the bases of which area interconnected, their respective collectors being connected to a first and a second current sources, the fourth transistor, which is diode-mounted, being smaller than the fifth transistor, and the output of the control block corresponding to the collector of the fifth transistor, a sixth bipolar transistor, of a different type than the first transistor, which is diode-connected and arranged between the emitter of the fourth transistor and the second supply pole, a seventh bipolar transistor, of a different type than the first transistor, arranged between the emitter of the fifth transistor and the second supply pole, the base of which is coupled to the second supply pole via a second resistor, an eighth bipolar transistor, of the same type as the first transistor, the emitter of which is coupled to the base of the seventh transistor via a third resistor, the collector of which is connected to the first supply pole, and the base of which is coupled to the second supply pole via a fourth resistor and to the input of the control block via a fifth resistor.
According to a further embodiment of the present invention, the first and second current sources are respectively ninth and tenth bipolar transistors of a different type than the first transistor, the respective emitters of which are coupled to the first supply pole via sixth and seventh resistors, the respective collectors of the ninth and tenth transistors being connected to the collectors of the fourth and fifth transistors, and their respective bases being connected to form a current mirror with an eleventh transistor of the same type, which is diode mounted and which is coupled to the first and second supply poles respectively via eighth and ninth resistors.
According to yet another embodiment of the present invention, the MOS-type transistors are NMOS transistors, the first transistor is of type NPN, and the first and second supply poles respectively represent a positive potential and the ground.
The present invention also provides an integrated circuit including such a circuit for providing a reference voltage.